A liquid crystal display device which employs an active matrix driving method is known as a conventional image display device. The liquid crystal display device, as shown in FIG. 19, includes a liquid crystal panel 1, a scanning line driving circuit 2, a signal line driving circuit 3, and a buffer circuit 4.
The liquid crystal panel 1 includes a matrix substrate 11, a facing substrate 12 provided so that it faces the matrix substrate 11 in parallel, and liquid crystal (not shown) filled between the both substrates 11 and 12. There are a plurality of scanning lines G(0) to G(3) and a plurality of signal lines S(0) to S(3) which cross each other and display cells 13 provided in a matrix manner on the matrix substrate 11. Counter electrode 16 shown in FIG. 20 is provided on the facing substrate 12 so that the counter electrode 16 solely corresponds to the display cells 13. Note that, although a case where the counter electrode 16 is provided on the facing substrate 12 is shown here, there is also an IPS (In Plane Switching) structure in which the counter electrode 16 is provided on the matrix substrate 11.
The display cell 13, as shown in FIG. 20, includes a thin film transistor (hereinbelow referred to as TFT) 14 which is a switching element, and a liquid crystal capacitance CLC. A source of the TFT 14 is connected to the signal line S(i), and a gate of the TFT 14 is connected to the scanning line G(j). Signal voltages V sp and V sn which are outputted from the signal line driving circuit 3 to the signal line S(i) are applied as a drain voltage Vd (i,j) via the source and a drain of the TFT 14 to a display electrode 15 which is an electrode of the liquid crystal capacitance CLC. Further, a common voltage V com which is outputted from the buffer circuit 4 shown in FIG. 19 is applied to the counter electrode 16 which is another electrode of the liquid crystal capacitance CLC. 
In this way, when potential deference between the drain voltage V d (i,j) and the common voltage V com is applied to the liquid crystal capacitance CLC, the transmittance or the reflection ratio of the liquid crystal 17 between the both electrodes 15 and 16 are changed, so that an image which corresponds to an inputted image data is displayed on the display cells 13. Further, a charge accumulated in the liquid crystal capacitance CLC is stored in for a given period, so that an image is kept displayed in the respective display cells 13, corresponding to the holding of the charge, even when the TFT 14 is OFF.
A method for displaying an image by scanning (applying) successively like the foregoing driving method is called a refresh method. Further, a period in which the signal voltages V sp and V sn are applied to the display cell 13, and further, the signal voltages V sp and V sn are stored by the liquid crystal capacitance CLC is called a refresh period.
In this liquid crystal display device, as shown in FIG. 21, when a gate pulse of potential differences (V gh to V gl) is outputted from the scanning line driving circuit 2 to the scanning line G(j) in the first refresh period T v1, the TFT 14 becomes ON, so that the signal voltage V sp of positive polarity which is being outputted from the signal line driving circuit 3 to the signal line S(i) in this while is applied to the display cell 13. Thereafter, the signal voltage V sp is stored by the liquid crystal capacitance CLC. In the next refresh period T v1, the signal voltage V sn of negative polarity which is being outputted from the signal line driving circuit 3 to the signal line S(i) is applied to the display cell 13 and stored in the same manner, while the TFT 14 is ON. In the liquid crystal display device, in order to prevent deterioration of the liquid crystal due to the application of the d.c. voltage, the signal voltages V sp and V sn of a different polarity are applied repeatedly, so that the liquid crystal is a.c.-driven, for example, in every dot.
Further, a luminous property is specified by an effective value (effective voltage V rms(P1) and V rms(N1)) of a differential voltage between the signal voltages V sp and V sn which is stored by the liquid crystal capacitance CLC. Thus, when the effective voltage V rms(P1) is not equal to the effective voltage V rms(N1), change of the luminance occurs in every refresh period, so that flicker occurs in the screen. As a result, the display quality degrades so much, and a residual DC which can bring about the deterioration of the liquid crystal is applied to the liquid crystal.
For example, in order to clear the foregoing defect, as shown in FIG. 19, an offset adjusting circuit 31 made of a variable resistance is provided in a conventional liquid crystal display device. In the offset adjusting circuit 31, a power supply voltage V ref is adjusted by the offset adjusting circuit 31 and the common voltage V com is changed so that the effective voltage V rms(P1) is equal to the effective voltage V rms(N1). In this way, the common voltage V com is adjusted, so that it is possible to suppress the flicker. The prior art, for example, is disclosed in Japanese Unexamined Patent Publication No. 15452/1999 (Tokukaihei 11-15452) (publication date: Jan. 22, 1999).
Incidentally, as shown in FIG. 21, there is a liquid crystal display device whose display is switched in a high-speed refresh display mode (hereinbelow referred to as display mode A) for displaying in a short refresh period T v1 and in a low-speed refresh display mode (hereinbelow referred to as B mode) for displaying in a long refresh period T v2. In this case, even when the signal voltages V sp and V sn are applied to the display cell 13 and are stored, in the display mode B whose refresh period is long, the effective voltage V rms(P2) is not equal to the effective voltage V rms(N2) in the refresh periods T v2 and T v2. This is caused by the following operating characteristic of the TFT 14.
First, as shown in FIG. 21, when the signal voltage V sp is applied and is stored, an OFF voltage V off(P) of the TFT 14 is a difference between a high stored potential and the potential V gl. When the signal voltage V sn is applied and is stored, an OFF voltage V off(N) of the TFT 14 is a difference between a low stored potential and the potential V gl.
Further, as shown in V gd-Id characteristic of FIG. 22 (V gd shows a voltage of the gate/drain line, and Id shows a drain current), the TFT 14 is not an ideal switch in that a leak current flows when it is OFF, and a leak current corresponding to the OFF voltage V off(N) and a leak current corresponding to the OFF voltage V off(P) are different in power.
Thus, the case where the signal voltage V sp is applied and stored is different from the case where the signal voltage V sn is applied and stored, in terms of amount of leak discharge in storing the voltage. As a result, as shown in FIG. 21, the effective voltage V rms(P2) and the effective voltage V rms(N2) which are based on the common voltage V com decline in different inclination, so that imbalance occurs. As the influence of this, the longer the refresh period becomes, the more imbalance occurs, so that change of the luminance occurs every time the refresh period changes. As a result, flicker occurs, and the quality of a displayed image degrades.
Note that, the refresh period is changed when a display mode is changed by a computer display, or when a TV display mode (NTSC and PAL) is switched. In addition to this, the refresh period is changed in low-frequency driving and cessation driving both of which are performed so that power can be saved.
Further, a leak current which occurs in the liquid crystal itself and other cause (leak current of the liquid crystal capacitance itself) bring about the imbalance of the effective voltages V rms(P2) and V rms(N2). Therefore, in order to suppress the occurrence of the flicker due to these causes, it is required to clear the imbalance of the effective voltage, regardless of the length of the refresh period.